? semiconductor components industries, llc, 2002 january, 2002 rev. 4 1 publication order number: 1n5820/d 1n5820, 1n5821, 1n5822 1n5820 and 1n5822 are preferred devices axial lead rectifiers . . . employing the schottky barrier principle in a large area metaltosilicon power diode. stateoftheart geometry features chrome barrier metal, epitaxial construction with oxide passivation and metal overlap contact. ideally suited for use as rectifiers in lowvoltage, highfrequency inverters, free wheeling diodes, and polarity protection diodes. ? extremely low v f ? low power loss/high efficiency ? low stored charge, majority carrier conduction mechanical characteristics: ? case: epoxy, molded ? weight: 1.1 gram (approximately) ? finish: all external surfaces corrosion resistant and terminal leads are readily solderable ? lead and mounting surface temperature for soldering purposes: 220 c max. for 10 seconds, 1/16 from case ? shipped in plastic bags, 500 per bag ? available tape and reeled, 1500 per reel, by adding a arl'' suffix to the part number ? polarity: cathode indicated by polarity band ? marking: 1n5820, 1n5821, 1n5822 maximum ratings please see the table on the following page device package shipping ordering information http://onsemi.com axial lead case 26705 (do201ad) style 1 schottky barrier rectifiers 3.0 amperes 20, 30, 40 volts preferred devices are recommended choices for future use and best overall value. 1n5820 axial lead 500 units/bag 1n5820rl axial lead 1500/tape & reel 1n5821 axial lead 500 units/bag 1n5821rl axial lead 1500/tape & reel 1n5822 axial lead 500 units/bag 1n5822rl axial lead 1500/tape & reel marking diagram 1n582x 1n582x = device code x = 0, 1 or 2
1n5820, 1n5821, 1n5822 http://onsemi.com 2 maximum ratings rating symbol 1n5820 1n5821 1n5822 unit peak repetitive reverse voltage working peak reverse voltage dc blocking voltage v rrm v rwm v r 20 30 40 v nonrepetitive peak reverse voltage v rsm 24 36 48 v rms reverse voltage v r(rms) 14 21 28 v average rectified forward current (note 1) v r(equiv) 0.2 v r(dc) , t l = 95 c (r q ja = 28 c/w, p.c. board mounting, see note 5) i o 3.0 a ambient temperature rated v r(dc) , p f(av) = 0 r q ja = 28 c/w t a 90 85 80 c nonrepetitive peak surge current (surge applied at rated load conditions, half wave, single phase 60 hz, t l = 75 c) i fsm 80 (for one cycle) a operating and storage junction temperature range (reverse voltage applied) t j , t stg 65 to +125 c peak operating junction temperature (forward current applied) t j(pk) 150 c *thermal characteristics (note 5) characteristic symbol max unit thermal resistance, junction to ambient r q ja 28 c/w *electrical characteristics (t l = 25 c unless otherwise noted) (note 1) characteristic symbol 1n5820 1n5821 1n5822 unit maximum instantaneous forward voltage (note 2) (i f = 1.0 amp) (i f = 3.0 amp) (i f = 9.4 amp) v f 0.370 0.475 0.850 0.380 0.500 0.900 0.390 0.525 0.950 v maximum instantaneous reverse current @ rated dc voltage (note 2) t l = 25 c t l = 100 c i r 2.0 20 2.0 20 2.0 20 ma 1. lead temperature reference is cathode lead 1/32 from case. 2. pulse test: pulse width = 300 m s, duty cycle = 2.0%. *indicates jedec registered data for 1n582022.
1n5820, 1n5821, 1n5822 http://onsemi.com 3 note 3 e determining maximum ratings reverse power dissipation and the possibility of thermal runaway must be considered when operating this rectifier at reverse voltages above 0.1 v rwm . proper derating may be accomplished by use of equation (1). t a(max) = t j(max) r q ja p f(av) r q ja p r(av) (1) where t a(max) = maximum allowable ambient temperature t j(max) = maximum allowable junction temperature (125 c or the temperature at which thermal runaway occurs, whichever is lowest) p f(av) = average forward power dissipation p r(av) = average reverse power dissipation r q ja = junctiontoambient thermal resistance figures 1, 2, and 3 permit easier use of equation (1) by taking reverse power dissipation and thermal runaway into consideration. the figures solve for a reference temperature as determined by equation (2). t r = t j(max) r q ja p r(av) (2) substituting equation (2) into equation (1) yields: t a(max) = t r r q ja p f(av) (3) inspection of equations (2) and (3) reveals that t r is the ambient temperature at which thermal runaway occurs or where t j = 125 c, when forward power is zero. the transition from one boundary condition to the other is evident on the curves of figures 1, 2, and 3 as a difference in the rate of change of the slope in the vicinity of 115 c. the data of figures 1, 2, and 3 is based upon dc conditions. for use in common rectifier circuits, table 1 indicates suggested factors for an equivalent dc voltage to use for conservative design, that is: v r(equiv) = v (fm) f (4) the factor f is derived by considering the properties of the various rectifier circuits and the reverse characteristics of schottky diodes. example: find t a(max) for 1n5821 operated in a 12volt dc supply using a bridge circuit with capacitive filter such that i dc = 2.0 a (i f(av) = 1.0 a), i (fm) /i (av) = 10, input voltage = 10 v (rms) , r q ja = 40 c/w. step 1. find v r(equiv). read f = 0.65 from table 1, v r(equiv) = (1.41) (10) (0.65) = 9.2 v. step 2. find t r from figure 2. read t r = 108 c @ v r = 9.2 v and r q ja = 40 c/w. step 3. find p f(av) from figure 6. **read p f(av) = 0.85 w @ i (fm) i (av) 10 and i f(av) 1.0 a. step 4. find t a(max) from equation (3). t a(max) = 108 (0.85) (40) = 74 c. **values given are for the 1n5821. power is slightly lower for the 1n5820 because of its lower forward voltage, and higher for the 1n5822. variations will be similar for the mbrprefix devices, using p f(av) from figure 6. table 1. values for factor f circuit half wave full wave, bridge full wave, center tapped*2 load resistive capacitive* resistive capacitive resistive capacitive sine wave 0.5 1.3 0.5 0.65 1.0 1.3 square wave 0.75 1.5 0.75 0.75 1.5 1.5 *note that v r(pk) 2.0 v in(pk) . 2use line to center tap voltage for v in .
1n5820, 1n5821, 1n5822 http://onsemi.com 4 figure 1. maximum reference temperature 1n5820 figure 2. maximum reference temperature 1n5821 figure 3. maximum reference temperature 1n5822 figure 4. steadystate thermal resistance 15 2.0 v r , reverse voltage (volts) 115 125 105 30 4.0 v r , reverse voltage (volts) 125 115 105 95 85 75 l, lead length (inches) 1/8 0 25 20 15 10 5.0 0 2/8 40 t r , reference temperature ( c) t r jl , thermal resistance 95 85 75 5.0 3.0 4.0 7.0 10 20 5.0 7.0 10 15 20 3/8 4/8 5/8 6/8 7/8 1.0 40 35 30 junction-to-lead ( c/w) both leads to heat sink, equal length maximum typical , reference temperature ( c) r r ja ( c/w) = 70 50 40 28 20 15 10 8.0 15 v r , reverse voltage (volts) 115 105 t r , reference temperature ( c) 95 85 75 5.0 3.0 4.0 7.0 10 20 r ja ( c/w) = 70 50 40 28 20 15 10 8.0 125 30 r ja ( c/w) = 70 50 40 28 20 15 10 8.0 r(t), transient thermal resistance (normalized) 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k 0.05 0.03 0.02 0.01 0.1 t, time (ms) 0.5 0.3 0.2 1.0 lead length = 1/4 p pk p pk t p t 1 time duty cycle = t p /t 1 peak power, p pk , is peak of an equivalent square power pulse. d t jl = p pk ? r q jl [d + (1 - d) ? r(t 1 + t p ) + r(t p ) - r(t 1 )] where: d t jl = the increase in junction temperature above the lead temperature. r(t) = normalized value of transient thermal resistance at time, t, i.e.: r(t 1 + t p ) = normalized value of transient thermal resistance at time t 1 + t p , etc. figure 5. thermal response 20 k the temperature of the lead should be measured using a ther mocouple placed on the lead as close as possible to the tie point. the thermal mass connected to the tie point is normally large enough so that it will not significantly respond to heat surges generated in the diode as a result of pulsed operation once steady-state conditions are achieved. using the measured val ue of t l , the junction temperature may be determined by: t j = t l + t jl
1n5820, 1n5821, 1n5822 http://onsemi.com 5 3.0 0.1 i f(av) , average forward current (amp) 10 7.0 5.0 0.7 0.5 0.1 5.0 p 0.2 0.3 0.5 2.0 , average power dissipation (watts) f(av) 3.0 2.0 1.0 0.3 0.2 0.7 1.0 7.0 10 figure 6. forward power dissipation 1n582022 dc square wave t j 125 c sine wave i (fm) i (av) (resistiveload) capacitive loads 5.0 10 20 t a(a) t a(k) t l(a) t c(a) t j t c(k) t l(k) p d r q s(a) r q l(a) r q j(a) r q j(k) r q l(k) r q s(k) note 4 approximate thermal circuit model use of the above model permits junction to lead thermal resistance for any mounting configuration to be found. for a given total lead length, lowest values occur when one side of the rectifier is brought as close as possible to the heat sink. terms in the model signify: t a = ambient temperature t c = case temperature t l = lead temperature t j = junction temperature r q s = thermal resistance, heat sink to ambient r q l = thermal resistance, lead to heat sink r q j = thermal resistance, junction to case p d = total power dissipation = p f + p r p f = forward power dissipation p r = reverse power dissipation (subscripts (a) and (k) refer to anode and cathode sides, respectively.) values for thermal resistance components are: r q l = 42 c/w/in typically and 48 c/w/in maximum r q j = 10 c/w typically and 16 c/w maximum the maximum lead temperature may be found as follows: t l = t j(max) t jl where t jl r q jl p d typical values for r q ja in still air data shown for thermal resistance junctiontoambient (r q ja ) for the mountings shown is to be used as typical guideline values for preliminary engineering, or in case the tie point temperature cannot be measured. 1 2 3 mounting method lead length, l (in) 1/8 1/4 1/2 3/4 r q ja 50 51 53 55 c/w c/w c/w 58 59 61 63 28 note 5 e mounting data mounting method 1 p.c. board where available copper surface is small. mounting method 3 p.c. board with 21/2 x 21/2 copper surface. board ground plane vector push-in terminals t-28 mounting method 2 ll ll l = 1/2
1n5820, 1n5821, 1n5822 http://onsemi.com 6 75 c 25 c 100 c t j = 125 c note 6 e high frequency operation since current flow in a schottky rectifier is the result of majority carrier conduction, it is not subject to junction diode forward and reverse recovery transients due to minor- ity carrier injection and stored charge. satisfactory circuit analysis work may be performed by using a model consist- ing of an ideal diode in parallel with a variable capacitance. (see figure 10.) figure 7. typical forward voltage figure 8. maximum nonrepetitive surge current figure 9. typical reverse current 1.2 v f , instantaneous forward voltage (volts) 50 5.0 number of cycles 5.0 100 1.0 10 v r , reverse voltage (volts) 8.0 0 50 0.2 0.01 16 i f , instantaneous forward current (amp) i 0.5 0.4 0 0.2 0.6 0.8 7.0 10 2.0 3.0 100 24 32 40 0.05 1.4 100 20 0.1 , peak half-wave current (amp) fsm 70 50 30 20 t j = 100 c 25 c 1.0 0.3 0.2 0.1 0.07 0.7 1.0 2.0 3.0 7.0 10 20 30 v r , reverse voltage (volts) 1.0 0.5 200 70 2.0 3.0 5.0 10 500 300 100 c, capacitance (pf) 0.7 7.0 20 30 1n5820 1n5821 1n5822 t j = 25 c f = 1.0 mhz 20 30 50 70 t l = 75 c f = 60 hz surge applied at rated load conditions figure 10. typical capacitance i , reverse current (ma) r 0.02 0.05 10 1.0 0.5 5.0 2.0 4.0 12 20 28 36 1n5820 1n5821 1n5822 1 cycle 1.1 0.3 0.1 0.5 0.7 1.3 0.9
1n5820, 1n5821, 1n5822 http://onsemi.com 7 package dimensions axial lead case 26705 (do201ad) issue g notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. style 1: pin 1. cathode (polarity band) 2. anode 1 2 k a k d b dim min max min max millimeters inches a 0.287 0.374 7.30 9.50 b 0.189 0.209 4.80 5.30 d 0.047 0.051 1.20 1.30 k 1.000 --- 25.40 ---
1n5820, 1n5821, 1n5822 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. 1n5820/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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